In general, a fuse option circuit for memory device is a control circuit that enables or disables a redundancy circuit in the memory device by controlling a connection state of fuse.
FIG. 1 is a conventional fuse option circuit.
As shown in the drawing, fuse 1 is connected between a power supply Vcc and a drain terminal A of the first NMOS transistor 11. The drain terminal A of the first NMOS transistor 11 is also connected to a common gate terminal of the first PMOS transistor 13 and the second NMOS transistor 12 which are connected in series. Here, the first PMOS transistor 13 and the second NMOS transistor 12 form a CMOS inverter. An output terminal B of the CMOS inverter is connected both to a gate terminal of the first NMOS transistor 11 which is connected to fuse 1, and to an input terminal of an inverter 14.
As fully appreciated from the above, according to the conventional fuse option circuit shown in FIG. 1, fuse 1 is connected between a power supply Vcc and a drain terminal A of the first NMOS transistor 11. On the contrary, FIG. 2 shows a state where the fuse 1 is disconnected.
The operation of the conventional fuse option circuit according to the prior art as discussed above will now be fully described in connection to FIGS. 1 and 2.
Referring now to FIG. 1 in which fuse 1 is connected, a high level potential at terminal A is produced through fuse 1 by means of the power supply Vcc. The high potential at terminal A effects the potential level at output terminal B of the CMOS inverter which has the first PMOS transistor 13 and a second NMOS transistor 12. The low level potential at output terminal B thus obtained is applied both to the gate of the first NMOS transistor 11 which is connected to fuse 1 in serial to keep the status of the first NMOS transistor 11 turning-off, and to the input terminal of inverter 14 so that the Vcc potential is outputted at the output terminal of inverter 14.
Referring to FIG. 2 in which fuse 1 is disconnected, even though terminal A is in a floating state, the junction leakage current is passed through the junction between terminal A and the substrate in fact. For this reason, the potential level at terminal A is kept to Vss potential which is ground potential. The Vss ground potential at terminal A is then outputted at the output terminal of the first inverter 14 through the CMOS inverter and the first inverter 14.
As such, the output potential of the fuse option circuit represents the Vcc potential which is a high level or the Vss potential which is a low level, in accordance with the connection state of the fuse. However, the fuse option circuit as mentioned above has a disadvantage which will be described in connection with FIG. 3, hereinafter.
FIG. 3 represents a state where the fuse 1 is incompletely cut and thus has a high resistance R. In FIG. 2 in which fuse 1 is completely connected, the potential level at terminal A is maintained as the Vss potential due to the junction leakage current, whereas in FIG. 3 shows that where fuse 1 is incompletely cut, the current is passed from the power supply Vcc through the fuse having a high resistance R and is then leaked through the junction between terminal A and the substrate. At the time, the output voltage of the fuse option circuit represents unstable potentials of the Vcc potential or the Vss potential, in accordance with the ratio of the high resistance R showing unstable values to the equivalent resistance at the junction connected to the substrate. That is, in the case that the value of the high resistance R is significantly greater than that of the equivalent resistance at the junction, the output of the fuse option circuit represents the Vss potential level as in the similar case of FIG. 2, so that the fuse option circuit operates stably. However, if the value of the high resistance R is significantly smaller than that of the equivalent resistance at the junction, the potential level at terminal A reaches a high level and the output of the fuse option circuit represents the Vcc potential level, which results in the failure of the operation of the fuse option circuit. Further, even in the case that the value of the high resistance R is the same as that of the equivalent resistance at the junction, the output of the fuse option circuit becomes unstable and thus represents the Vcc or Vss potential alternately, which also results in the failure of the operation of the fuse option circuit. From the reasons mentioned above, problems which deteriorate the production yield exist.